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Ismail-Sutherland Apparatus Manual v1.0.pdfThe Ismail-Sutherland Apparatus is a functional toy CPU, constructed from scratch and using a custom instruction set architecture. This project was an exercise in low-level computer architecture and design.
In brief, the system is a single-cycle little-endian CPU with four general purpose 8-bit registers. It supports add, subtract, memory load, and memory store instructions. For more information about the system's specifications, please refer to the attached manual.
The included assembler is written in Python, and the CPU circuit can be simulated in Logisim Evolution v3.9.0 or newer.
These are my initial schematics for the CPU's overall construction, including notes on the instruction encoding format. This physical blueprint was used to create the digital implementation below.
An overview diagram of the main circuit, including direct readouts for monitoring data transfers within the instruction stages.
The internal logic of the 4-way register file.
The basic ALU, supporting add and subtract operations.
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